I have decided on developing a device which would have a speech interface. I will be using my knowledge on FPGAs so far and my knowledge in digital signal processing to develop this real-time speech recognition device that would interact with the surrounding using analog (audio) inputs from a user. I would still be using Verilog Hardware Description Language to implement my design with the aid of block diagrams showing dataflow and control flow.
EQUIPMENTS
Development Kit: Altera DE2 – Cyclone II FPGA
Software: ModelSim-Altera Edition, Quartus II, MATLAB and maybe NIOS II.
The project would include the following implementations
· Design approach
· A/D Conversion
· Word detector
· FFT
· Memory Management
· Distance Computation
For the design, I would be using Quartus II to create Verilog blocks as well as CAD. I would also need datapath and intermediate controllers. The Development kit contains the Cyclone II FPGA, CODEC and Analog-to-digital converter integrated. I would be using three memory modules which include FLASH, SDRAM and SRAM. With the help of Quartus II, I would design a 1024-points FFT module and a distance computation module using Verilog.
I have learned to work with Quartus II over the past weeks and would currently proceed in understanding the background theories behind the design, Analog-to-digital converter, FFT and distance computation modules, and memory management. I would spend the next 2 weeks researching into these areas to help develop a better understanding for my hardware implementation
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