COUNTER USING AN FPGA

I have decided to implement a counter as a start for FPGA applications.

I wrote the following verilog code of a counter from 0 to 8 for my digital electronics class & thought it would be a great idea to implement it on an FPGA Board;

module counter (count, clk, reset);

output [8:0] count;

input clk, reset;

reg [8:0] count;

parameter tpd_reset_to_count = 3;

parameter tpd_clk_to_count   = 2;

function [8:0] increment;

input [8:0] val;

reg [3:0] i;

reg carry;

  begin

    increment = val;

    carry = 1'b1;

    /*

     * Exit this loop when carry == zero, OR all bits processed

     */

    for (i = 4'b0; ((carry == 4'b1) && (i <= 8));  i = i+ 4'b1)

       begin

         increment[i] = val[i] ^ carry;

         carry = val[i] & carry;

       end

  end      

endfunction

always @ (posedge clk or posedge reset)

  if (reset)

     count = #tpd_reset_to_count 8'h00;

  else

     count <= #tpd_clk_to_count increment(count);

endmodule

Easily Installed Project on DE2

There are a couple of easily accessible projects installed for the DE2. I have made a temporary decision to change the focus of my FPGA research project as advised by my advisor, Dr Walker. I would update this blog on Friday with information about this new project I would be choosing to complete as the semester comes to an end.

RESEARCH UPDATE - Week of 10/24

The past few weeks have been really challenging due to my work load, alongside responsibilities. I haven't been updating this blog as often as I used to for this reason.

I temporarily suspended the speech recognition project for a while due to on going research into my background understanding and revaluation of requirements and goals to achieve. I met with Dr Walker some weeks back and he asked me what options are there for me to upload my program into the FPGA and/or development board. There were multiple answers to this question. One option was to use simulink and another option was to use Model Sim alongside Quartus II. This provides a platform to both simulate and run my program on the FPGA board.

As I said earlier, I got in touch with a couple of valuable contacts. Carlos has been very resourceful with information. Honestly, as we all know, the speech recognition project is a very tasking project and would require a high level of competence within the field. I am glad this project has made me see the good, bad and ugly sides of how a research project could go. I love the fact that these create challenges and my top goal for this research project is to never give up. The more challenging a task, the more research and work I put into it and thus, the more I learn and experience I derive.

I had been working the arduino microcontrollers all semester and now the second half of my microprocessors class involves xilinx FPGAs. Although Xilinx and Altera have differences, they operate the same way. I am taking all my electives this semester and most of my classes this semester are directly or indirectly related the speech recognition project. Everyday, I often learn more and develop a deeper understanding of what I'm getting into, The question now is what is my current status? The truth is that there are no single answers to the questions. At the moment, I am learning more and gaining insight into how to get the work done. As I look forward to working with Xilinx in my class, I hope I would learn as much so as to enable my project move forward. My Digital Signal processing class is also a very valuable asset for my project. I spoke to my DSP professor, Dr Clarke, about my idea and project some weeks back and he really loved it. Although, he agreed to the fact that the project would involve a lot of computations, I still till today believe I can bring my speech recognition device to life. I never give up until I achieve my goal.

Furthemore, I am pleased to announce that I participated in the IEEE Xtreme 5.0 programming competition from Friday to Saturday 10.24.2011. This was a honored privilege as I was a part of the pioneer programmers from Morgan State University who participated in the competition.

DESIGN APPROACH

I haven't been chanced to update my blog in a couple of weeks but that didn't mean I couldnt't get work done. During the long break, I was able to contact a member of the team from McGrill University; Carlos Asmat, who had previously worked on a speech recognition device successfully. This project has involved me networking with alot of people including professors both with and outside Morgan State University.

I met with Dr Walker last week and we spoke about simulation and testing. We discussed about software preferences and the options to pick between ModelSim and Simulink. I have had issues working around ModelSim alongside Quartus II but since Simulink has a DSP builder module for altera, I would be giving simulink a try.


This does not mean I won't go back to Quartus II as it is my prefered CAD software. 
The semester is getting busy everyday and as a result, my progress has become a bit slow but I haven't let that affect my work.

Creating a speech recognition device using FPGA technology

PROJECT: Speech Recognition Device Using FPGA Technology

I have decided on developing a device which would have a speech interface. I will be using my knowledge on FPGAs so far and my knowledge in digital signal processing to develop this real-time speech recognition device that would interact with the surrounding using analog (audio) inputs from a user. I would still be using Verilog Hardware Description Language to implement my design with the aid of block diagrams showing dataflow and control flow.

EQUIPMENTS

Development Kit: Altera DE2 – Cyclone II FPGA

Software: ModelSim-Altera Edition, Quartus II, MATLAB and maybe NIOS II.

The project would include the following implementations

·         Design approach

·         A/D Conversion

·         Word detector

·         FFT

·         Memory Management

·         Distance Computation

For the design, I would be using Quartus II to create Verilog blocks as well as CAD. I would also need datapath and intermediate controllers. The Development kit contains the Cyclone II FPGA, CODEC and Analog-to-digital converter integrated. I would be using three memory modules which include FLASH, SDRAM and SRAM. With the help of Quartus II, I would design a 1024-points FFT module and a distance computation module using Verilog.

I have learned to work with Quartus II over the past weeks and would currently proceed in understanding the background theories behind the design, Analog-to-digital converter, FFT and distance computation modules, and memory management. I would spend the next 2 weeks researching into these areas to help develop a better understanding for my hardware implementation

Working on Quartus II Using Verilog

Quartus II is Computer Aided Design (CAD) software that makes it easy to implement a desired logic circuit by using a programmable logic device like an FPGA. For this project, I would be specifying my desired circuit in Verilog hardware description language - Verilog Entry Level. The CAD flow involves certain steps which I'd divide into phases.

I have divided these 7 steps into learning phases and they include:
• Creating a project
• Design entry using Verilog code
• Synthesizing a circuit specified in Verilog code
• Fitting a synthesized circuit into an Altera FPGA
• Assigning the circuit inputs and outputs to specific pins on the FPGA
• Simulating the designed circuit
• Programming and configuring the FPGA chip on Altera’s DE2 board

I plan to play around with the Altera board during each learning phase, so I am going to feel free to be creative with the simplest of designs. I already started with the first phase, which is how to create a project on Quartus II. My plan is to learn the second & third by Tuesday 9/26/2011, fourth & fifth by Friday 9/30/2011 and finally sixth & seventh by Tuesday 10/4/2011.

Right now for my learning phase, I am working on a project I created for a two-way light control. Through the tutorial, I have learned to use the project wizard to create new projects and set the working directory to be used. I am also able to specify the type of device in which my designed circuit will be implemented. In my case, I would be choosing the device: "EP2C35F672C6" because it is the FPGA used on Altera’s DE2 board I'm using for this project. I realized a user can also specify any third-party tool to be used for instance a CAD software for electronic circuits e.g. Electronic Design Automation tools. I am currently working at the fastest pace I can and amazed by how much I have learned so far. The functionality and operation of FPGAs were a mystery to me before I started this research. So far I have not only learned how they operate, but also learned how they could be configured and if needed be reconfigured.

This reminds me of a Senior presentation I witnessed some years back where a student was able to reconfigure a router firmware to perform certain other operations like controlling an automated robot. I wondered how he was able to use verilog for this task but now I have a full understanding of the process. This has come a long way in motivating my research on FPGAs. The use of a router was an alternative to using an FPGA which could  have been too expensive to afford.

ModelSim and Quartus II Design Software

Goal For Week of 9/12/2011

My goal for last week which was to first understand what I am working on. I was a able to accomplish this by reading up tutorials and online resources. FPGA was a new technology introduced to me, so I had to first do my homework. I did research to increase my insight on FPGA by speaking to my peers, professors and some research assistants.
I was able to understand how FPGAs work, and relate them to their application. I created a more vivid picture of how creative I could get using FPGAs. I also figured out the advantages of FPGAs over other technologies like ASIC due to its "field-programmable" feature. This gives the ease for updates and reconfigurations.

Goals For Week of 9/19/2011

My goal this week is to familiarize myself with the ModelSim-Altera Edition and Quartus II design software. I learned about it from a friend who suggested it while discussing about the project with him last week.

This way, it would be a lot easier to implement my high level design. I have downloaded and installed the software on my computer and since then been going over the tutorials as well as playing around with it.

I also installed ModelSim which was introduced to me in my Digital Electronics class. I have been used to the Eclipse IDE for verilog coding but through my research, I found ModelSim to be more specific with its functionality as opposed to other integrated environments.

I haven't finalized my decision on what I am going to be designing yet because I wish to project the limit of what could be done that would be highly interactive for kids on an FPGA.

My Microprocessors Application class this semester would be a huge resource for me while working on this research project as I would be working on FPGAs as well.

I have developed a background knowledge on what FPGAs are all about so far, but I would keep learning as I go on with the research.

Altera provides a couple of useful online tools and guides on how to use the Quartus II and ModelSim software so I would be using them in effort to accomplish this week's goals.

However, I wouldn't limit myself to just the online resources, I also copied the tutorial files from the Altera DE2 CD. I am taking every step possible to meet my goal for this week.

Update: Understanding FPGAs

FPGAs allow firmware which is stored in non-volatile memory, such as ROM to be modified without disassembling the device or returning it to its manufacturer. This aids in the development and rapid deployment of digital electronic devices. FPGAS are the modern-day technology for building a breadboard or prototype from standard parts.
Firmwares are fixed, usually rather small, programs and/or data structures that internally control various electronic devices. Firmwares are typically involved with very basic low-level operations without which a device would be completely non-functional. High-level firmware is typically stored as a configuration of charges, while low-level firmware may instead be regarded as actual hardware in itself. Hardwares just like softwares can be designed modularly, by creating subcomponents and then higher-level components to instantiate them. Moreover, unlike most modern operating systems, firmwares rarely have well-evolved automatic form of updating itself to fix any functionality issues detected after shipping the unit from the manufacturer.
FPGAs contain programmable logic components (logic blocks) and reconfigurable interconnects that would allow the blocks to be wired together. It is like a lot of logic gates that can be interconnected in a lot of configurations. Logic blocks are often configured to perform complex combinational functions or just simple logic gate functions like AND and XOR. Some FPGAs have logic blocks with memory elements which could be simple flip-flops or more complete blocks of memory.

Update 9/13/2011: Verilog HDL & Algorithm

I have decided that the HDL I am going to use is Verilog. As a step forward in my project, I have decided to revise and refresh my knowledge on verilog coding. I went over various tutorials and techniques. I am yet to go over materials for the Altera FPGA but I am pretty much developing an algorithm for my design as of right now.

I'd like to divide my project into 5 different parts;

1. Specification: This is the point at which I would define the parameters in my design that I plan to use.

2. High Level Design: This is the point where I define various blocks/modules within my design and how they communicate with each other

3. Low Level Design: This is the point where I define how each block is implemented

4. RTL Coding: This is the point where I convert my low level design into verilog code

5. Simulation: This is the point where I verify the functionality of the model of program I wrote in verilog

Altera DE2 - Cyclone II 2C35 FPGA

First question would be what is an FPGA (Field-Programmable Gate Array)? 
A field-programmable gate array (FPGA) is a semiconductor device that can be programmed after manufacturing. Instead of being restricted to any predetermined hardware function, an FPGA allows you to program product features and functions, adapt to new standards, and reconfigure hardware for specific applications even after the product has been installed in the field—hence the name "field-programmable". You can use an FPGA to implement any logical function that an application-specific integrated circuit (ASIC) could perform, but the ability to update the functionality after shipping offers advantages for many applications.


FEATURES

FPGA	Cyclone II EP2C35F672C6 with EPCS16 16-Mbit serial configuration device
I/O Interfaces	Built-in USB-Blaster for FPGA configuration Line In/Out, Microphone In (24-bit Audio CODEC) Video Out (VGA 10-bit DAC) Video In (NTSC/PAL/Multi-format) RS232 Infrared port PS/2 mouse or keyboard port 10/100 Ethernet USB 2.0 (type A and type B) Expansion headers (two 40-pin headers)
Memory	8 MB SDRAM, 512 KB SRAM, 4 MB Flash SD memory card slot
Displays	Eight 7-segment displays 16 x 2 LCD display
Switches and LEDs	18 toggle switches 18 red LEDs 9 green LEDs Four debounced pushbutton switches
Clocks	50 MHz clock 27 MHz clock External SMA clock input

source: http://www.altera.com/products/fpga.html

Introduction

My Name is Hassan A Badru, a Computer Engineering concentration and I am currently a senior gradually May 2012 at Morgan State University.

I am currently working with Dr Lawrence Walker on a research project which requires me to make the Altera Cyclone II 2C35 FPGA highly interactive for kids. This would be a challenging project as I would need to first understand what kids enjoy which includes colors, lights, voices and buttons.

As a computer engineer, I am bounded by system requirements as result I would need to set system requirements. I would make children interactivity be my first requirement. As I move further, other requirements would surface and I would be forced to implement them into my design.
My next challenge would be the design and lastly construction and implementation.I would need the knowledge of digital signal processing and hardware description language while working on this project.


Ideas For Project
1. Speech recognition - by first training the device with a signal, then comparing with trained signal.
2. Voice change - receiving voice/signal, then process the signal and finally output the modified signal.
3. Rhythmic lightning - letters and number displayed in rhythmic pattern.
4. Photo Morph - allow user to take a face snapshot, and then get it morphed on a display screen.